1. Field of Invention
The present invention relates to a method for protecting the gate oxide layer of a MOS device. More particularly, the present invention relates to a method that utilizes a shielding layer to protect the gate oxide layer against processing damages.
2. Description of Related Art
In the manufacturing the gate of a MOS device, a thin gate oxide layer is first formed over a semiconductor substrate. Thereafter, a polysilicon layer that acts as a gate electrode is formed over the gate oxide layer. Next, a dielectric layer is formed over the gate electrode and the substrate to form multi-layered metallic interconnects. The dielectric layer serves as a layer of insulating material separating the metallic interconnects from the gate electrode. Since the dielectric layer lies between the gate electrode and the first metallic interconnect, the dielectric layer is also known as an inter-layer dielectric (ILD) layer.
In general, a high-density plasma (HDP) etching operation is normally used to form metallic interconnects in the ILD layer. The HDP etching technique is preferred because ultimately a trench having a better gap-filling capacity is formed. However, during a HDP etching operation, quality of the gate oxide layer in the MOS device may be affected. The two main reasons are:
1. Due to the attraction effect of the gate electrode of a gate structure, charged particles in the high-density plasma penetrates through the dielectric layer into the gate electrode. Moreover, a portion of the charged particles are energetic enough to enter the gate oxide layer. Any movement of charged particles inside the gate oxide layer destroys the compact internal structure. Hence, defects may form within the gate oxide layer. PA1 2. When an HDP etching operation is carried out, strong ultraviolet or short wavelength radiation are generated due to the bombardment of the substrate by highly charged particles within the plasma. Ultraviolet or short-wavelength radiation has a very high penetrating power and is able to pass through the dielectric layer surrounding the gate oxide layer. Ultimately, a portion of the light is absorbed by the gate oxide layer. Since ultraviolet rays or short-wavelength radiation contains a lot of energy, the electric charges originally trapped within the gate oxide layer, at the interface between the gate oxide layer and the substrate and at the interface between the gate oxide layer and the gate electrode, can be activated to produce a large quantity of excited electron-hole pairs. These excited electron-hole pairs move about destroying the fine crystalline structure within the gate oxide layer.
In fabricating semiconductor devices in the deep sub-micron range, the quality of the gate oxide layer is very important. Since a gate oxide layer can have a thickness as small as 100 .ANG., any attraction of charged particles or irradiation by ultraviolet or short-wavelength radiation creates many defects within the gate oxide layer. Once the gate oxide layer contains defects, quality of the semiconductor device can be affected and its product yield can be lowered.
The conventional method of minimizing damages inflicted upon the gate oxide layer is to form a protective diode that links the gate oxide layer with the substrate. As soon as charged particles reach the gate oxide layer, these charged particles are led to the protective diode and then drained away via the substrate. Hence, the protective diode is able to reduce the flow of charges within the gate oxide layer, and prevent much of the damage due to the attraction effect. However, the protective diode is unable to protect the gate oxide layer against destructive ultraviolet rays or other short-wavelength radiation. Therefore, any short-wavelength radiation or ultraviolet light generated by high-density plasma can still penetrate into the gate oxide layer.
In light of the foregoing, there is a need to provide a method of minimizing the damages inflicted upon the gate oxide layer of a MOS device due to plasma etching.